# Parameters
PARAMETER VERSION = 2.0.0

# Global Ports

PORT sys_clk = sys_clk, DIR = IN, SIGIS = CLK
PORT SRAM_Addr = SRAM_Addr, DIR = OUT, VEC = [0:31]
PORT SRAM_WEN = SRAM_WEN, DIR = OUT
PORT SRAM_Data = SRAM_Data, DIR = INOUT, VEC = [0:31]
PORT SRAM_Rst = SRAM_Rst, DIR = OUT
PORT SRAM_OEN = SRAM_OEN, DIR = OUT
PORT SRAM_STS = SRAM_STS, DIR = IN
PORT SRAM_BEN = SRAM_BEN, DIR = OUT, VEC = [0:3]
PORT SRAM_CEN = SRAM_CEN, DIR = OUT, VEC = [0:1]
PORT RX = RX, DIR = IN
PORT TX = TX, DIR = OUT
PORT debug_uart_RX = debug_uart_RX, DIR = IN
PORT debug_uart_TX = debug_uart_TX, DIR = OUT
PORT GPIO = GPIO, DIR = INOUT, VEC = [0:31]
PORT sys_reset = sys_reset, DIR = IN

# Sub Components


BEGIN microblaze
 PARAMETER INSTANCE = mblaze
 PARAMETER HW_VER = 1.00.e
 PARAMETER C_USE_BARREL = 1
 PORT INTERRUPT = mblaze_int
 PORT CLK = sys_clk
 BUS_INTERFACE DLMB = d_lmb_v10
 BUS_INTERFACE ILMB = i_lmb_v10
 BUS_INTERFACE DOPB = d_opb_v20
 BUS_INTERFACE IOPB = d_opb_v20
END

BEGIN lmb_lmb_bram_if_cntlr
 PARAMETER INSTANCE = lmb_lmb_bram
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x00001FFF
 PORT LMB_Clk = sys_clk
 BUS_INTERFACE ILMB = i_lmb_v10
 BUS_INTERFACE DLMB = d_lmb_v10
 BUS_INTERFACE PORTA = conn_0
 BUS_INTERFACE PORTB = conn_1
END

BEGIN bram_block
 PARAMETER INSTANCE = bram
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_MEMSIZE = 8192
 BUS_INTERFACE PORTA = conn_0
 BUS_INTERFACE PORTB = conn_1
END

BEGIN opb_memcon
 PARAMETER INSTANCE = memcon
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_OPB_CLOCK_PERIOD_PS = 10_000
 PARAMETER C_NUM_BANKS_MEM = 2
 PARAMETER C_BASEADDR = 0xFFFF0000
 PARAMETER C_HIGHADDR = 0xFFFF00FF
 PARAMETER C_MEM0_BASEADDR = 0xFFE00000
 PARAMETER C_MEM0_HIGHADDR = 0xFFEFFFFF
 PARAMETER C_MEM1_BASEADDR = 0xFF000000
 PARAMETER C_MEM1_HIGHADDR = 0xFF7FFFFF
 PORT Mem_A = SRAM_Addr
 PORT Mem_WEN = SRAM_WEN
 PORT Mem_DQ = SRAM_Data
 PORT Mem_RPN = SRAM_Rst
 PORT Mem_OEN = SRAM_OEN
 PORT OPB_Clk = sys_clk
 PORT Mem_STS = SRAM_STS
 PORT Mem_BEN = SRAM_BEN
 PORT Mem_CEN = SRAM_CEN
 BUS_INTERFACE SOPB = d_opb_v20
END

BEGIN opb_uartlite
 PARAMETER INSTANCE = uartlite
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_CLK_FREQ = 100_000_000
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_ODD_PARITY = 0
 PARAMETER C_BAUDRATE = 57_600
 PARAMETER C_BASEADDR = 0xFFFF2000
 PARAMETER C_HIGHADDR = 0xFFFF20FF
 PORT OPB_Clk = sys_clk
 PORT RX = RX
 PORT TX = TX
 BUS_INTERFACE SOPB = d_opb_v20
END

BEGIN opb_timer
 PARAMETER INSTANCE = timer
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_BASEADDR = 0xFFFF1000
 PARAMETER C_HIGHADDR = 0xFFFF10FF
 PORT Interrupt = timer_irq
 PORT OPB_Clk = sys_clk
 BUS_INTERFACE SOPB = d_opb_v20
END

BEGIN opb_intc
 PARAMETER INSTANCE = intc
 PARAMETER HW_VER = 1.00.c
 PARAMETER C_BASEADDR = 0xFFFF3000
 PARAMETER C_HIGHADDR = 0xFFFF30FF
 PORT Intr = timer_irq
 PORT Irq = mblaze_int
 PORT OPB_Clk = sys_clk
 BUS_INTERFACE SOPB = d_opb_v20
END

BEGIN opb_uartlite
 PARAMETER INSTANCE = debug_uart
 PARAMETER HW_VER = 1.00.b
 PARAMETER C_CLK_FREQ = 100_000_000
 PARAMETER C_BAUDRATE = 115_200
 PARAMETER C_USE_PARITY = 0
 PARAMETER C_ODD_PARITY = 0
 PARAMETER C_BASEADDR = 0xFFFF4000
 PARAMETER C_HIGHADDR = 0xFFFF40FF
 PORT OPB_Clk = sys_clk
 PORT RX = debug_uart_RX
 PORT TX = debug_uart_TX
 BUS_INTERFACE SOPB = d_opb_v20
END

BEGIN opb_gpio
 PARAMETER INSTANCE = gpio_instance
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0xFFFF5000
 PARAMETER C_HIGHADDR = 0xFFFF50FF
 PORT OPB_Clk = sys_clk
 PORT GPIO_IO = GPIO
 BUS_INTERFACE SOPB = d_opb_v20
END

BEGIN lmb_v10
 PARAMETER INSTANCE = i_lmb_v10
 PARAMETER HW_VER = 1.00.a
 PORT LMB_Clk = sys_clk
 PORT SYS_Rst = sys_reset
END

BEGIN lmb_v10
 PARAMETER INSTANCE = d_lmb_v10
 PARAMETER HW_VER = 1.00.a
 PORT LMB_Clk = sys_clk
 PORT SYS_Rst = sys_reset
END

BEGIN opb_v20
 PARAMETER INSTANCE = d_opb_v20
 PARAMETER HW_VER = 1.10.b
 PORT SYS_Rst = sys_reset
 PORT OPB_Clk = sys_clk
END